VERBONDS
VERBONDS (BREU-CU91-0487) - Solder Joint Inspection:
"A flexible, multi-sensor, solder joint inspection system for verification of solder bond quality in advanced electronic component packages."
Project funded by the BRITE/EURAM European initiative: Oct 1991 - Nov 1994
Total consortium funding 3 million ECU, Individual funding to LJMU £400,000
Solder joint inspection is by far the most demanding stage of the inspection cycle. Bare printed circuit board inspection and solder paste inspection are relatively insignificant in terms of difficulty when compared to full post solder inspection of the loaded printed circuit board. In the former cases the faults encountered are either small in variety and fairly predictable, are easily measurable, or can be detected by means of circuit test without recourse to a detailed inspection stage. Solder joints themselves have specularly reflective surfaces and are very far from an ideal surface to measure using optical means. One other significant factor is the sheer number of possible faults and combinations of faults which may have occurred when reaching the post solder phase of assembly. The requirement of very high inspection speeds also adds difficulty to this problem.
The VERBONDS European Consortium:
- LUCAS ENGINEERING AND SYSTEMS (Solihull, u.k.)
- DIGITAL EQUIPMENT CORPORATION (Galway, EIRE/Ayr, U.K.)
- SOFRETEC (Paris, FRANCE)
- LETI (Grenoble, FRANCE)
- LIVERPOOL JOHN MOORES UNIVERSITY (Liverpool, U.K.)
-
TRINITY COLLEGE DUBLIN (Dublin, EIRE)
Summary:
- VERBONDS succeeded at measuring solder joints at high speed using optical structured-lighting techniques.
- Measurement of solder joint surface shape was achieved using fringe projection contouring techniques.
- Different fringe analysis techniques were investigated to process the images and thereby extract 3-D height data from the fringe patterns. These included phase stepping and Fourier Transform methods. The processing technique eventually chosen was Fourier fringe analysis.
- Specialist computing hardware was designed to meet the image processing requirements in order to realise the specified inspection rates of 100 solder joints per second.
Surface-Mount Technology:
SOIJ – Small outline Integrated J-Lead Package
Close-up of 2 J-leads from SOIJ Package, one good solder joint (Right) and one bad joint (Left – Dry Joint)
Gull-Wing SOIC Package
Isometric 3-D Height-Plot Of 4 Solder Joints From Gull-Wing SOIC Package
Wrapped Phase Map Of Gull-Wing SOIC, Calculated Using FTP technique
Greyscale Height Map Of Gull-Wing SOIC Component
Image of part of the lead array of a fine pitch SMT component (Left) Fringe contoured image - white light, square wave fringes (Right)
Part of resulting phase map, solder joints show as dark patches. Note only every other joint is bonded. This simulates soldering faults.
